1) Field of the Invention
This invention relates to integrated circuits and semiconductor devices. It relates particularly to a structure and method for producing integrated circuits having an improved contamination guard ring for circuit redundancy applications and laser repair alignment mark applications.
2) Description of the Prior Art
Semiconductor chips often have fusible link regions and alignment mark regions, both of which frequently lower chip yields and reliability by allowing contamination to penetrate to the device regions. Integrated circuits often include fusible conductive links (fuses) that may be rendered non-conductive (i.e. blown) by the running a high current. Fuses can also be blown by applying laser energy with a laser repair machine.
In dynamic or static memory chips, defective memory cells may be replaced by blowing the fuses associated with the defective cells, and activating a spare row or column of cells. The spare cells can be activated by blowing fuses. This circuit rewiring using fusible links allows considerable enhanced yields and reduces the production costs.
Furthermore, logic circuits may also be repaired or reconfigured by blowing fuses. For example, it is common to initially fabricate a generic logic chip having a large number of interconnected logic gates. Then, in a final processing step, the chip is customized to perform a desired logic function by disconnecting the unnecessary logic elements by blowing the fuses that connect them to the desired circuitry. Still other applications of laser-blown fuses are possible.
An important challenge is to improve the reliability of the semiconductor devices surrounding fusible links and alignment mark regions, especially when a large number of these regions are on a chip. A problem with fusible link and alignment mark regions is that moisture and other contaminates can diffuse from the fuse regions into the device areas thus reducing circuit reliability and yields.
FIG. 1 shows a top plan view of a semiconductor chip with fusible links regions 12 and alignment mark regions 14. Often a chip contains alignment marks which are used to align the laser repair machine.
A conventional fusible link region and an adjacent device region is shown in FIG. 2. FIG. 3 shows a cross-sectional view of the same link and device regions taken along horizontal axis labeled 3. Fuse 26 can be formed of a metal, such as aluminum, platinum silicide or titanium tungsten, polysilicon, or a polycide, such as titanium polycide, tungsten polycide or molybdenum polycide.
Fuse 26 is normally formed over a thick field oxide regions 31 in semiconductor substrate 10. Fuse 26 is formed over the field oxide regions 31 to prevent shorting of the fuse 26 to the substrate 10 through a thinner insulating layer. Layers 32,34,36 are insulating layers, such as borophosphosilicate glass, silicon oxide and silicon nitride respectively. Opening 28 is formed over the fuse area through the insulating layers 32,34,36. Opening 28 can have a width of 5 microns and a length of 5 microns. An adjacent semiconductor device is shown with buried N+ regions 60 61 62, gate oxide 64, gate 66, via 40 and metal layers 68 70.
There are two methods for blowing fuses: a) using a laser and b) passing a high current through the fuse. Both methods require that the fuse is covered by a very thin insulation layer because this layer must be able to be penetrated and melted away by the laser. The portion of the fuse and thin insulating layer which is melted away or "blown" must not deposit or interfere with near-by devices.
A laser is often used to break the fuse forming an electrical open by heating the fuse to a high temperature. It is conventional to have an opening 28 over the fuse in the area where the fuse will be broken so that the laser heating will be more effective. Because the passivation layer would inhibit the laser, the passivation layers are normally opened to the single insulating layer covering the fuse 26. An alternative is to form a thin insulating layer over the fuse. See U.S. Pat. No. 5,825,300 discussed below. In the example shown in FIG. 3 two passivation layers are used: Silicon nitride 36 and inter-metal dielectric layer 34.
Alignment marks are used to align the laser on the correct portion of the fuse to be blown. Window openings in the passive layers are formed so that the alignment marks can be clearly viewed.
A conventional alignment mark region is shown in a top plan view in FIG. 4A and in a cross-section view along axis 4B in FIG. 4B. Alignment mark metal 35 is formed in window opening 28 on several insulation layers. The layers illustrated in FIG. 4B are: silicon oxide 31, borophosphosilicate glass 32, composite layer 34 and silicon nitride 36. Composite layer 34 can be formed of three layers: oxide, Spin on glass, oxide. A problem with the window 28 is that contamination can enter through the exposed composite layer 34 and harm nearby devices.
A major problem with any window opening in the passivation layers is that moisture and contamination can enter through the exposed insulation layers and diffuse to the semiconductor devices. The diffused moisture and contaminates can decrease reliability and yields. Moisture is present in the air and sodium (Na+ ions) are plentiful in the environment.
As shown in FIG. 3 and 4B, moisture and other contaminates can enter through the window 28 into layer 34 and diffuse to the adjacent semiconductor devices. These contaminates can diffuse through the inter-metal dielectric layer 34 to the nearby devices 31 64. Water will attack the metal via 40, with the following reaction: EQU 3 H.sub.2 O+Al.fwdarw.Al (OH).sub.3 +3/2 H.sub.2
causing the resistance of metal via's 40 to increase and finally cause circuit failure.
FIG. 3 shows an opening 28, buried N+regions 60 61 62, field oxide 31, gate oxide 64, polysilicon gate 66, and metal layers 68 70. Mobile ions, such as sodium ions, can diffuse through inter-metal dielectric layer 34, and through the insulating layer 32 into the field oxide layer 31. Mobile ions in the field oxide layer 31 can cause field inversion. The field inversion causes undesired leakage current between adjacent buried N+ (or P+) regions 60, 61. Also, mobile ions in the gate oxide 64 will cause a transistor threshold shift whereby the circuit fails.
The following three U.S. patents show fusible link structures, but do not solve the problem of contamination diffusing through the window opening and the insulating layers.
M. Limpet, III, U.S. Pat. No. 5,235,205 discloses a method of forming a window in the insulating layer of an integrated circuit to allow laser trimming of a fusible link. Lippett's method involves forming a thin first insulating layer over the fuse that a laser is capable of cutting through. Then forming an etch stop layer and a second thicker insulating layer over the first insulating layer. The second insulating layer and the etch stop layer are etched in a controlled manner to expose the first insulating layer overlying the fuse. This invention produces layers over fuses that are capable of being cut through. However, this invention does not solve the problem of moisture and contaminates diffusing into the passivation layer through the window.
Billig et all, U.S. Pat. No. 5,025,300 discloses a method of forming a very thin protective insulating layer over the fuse in a window. The thin insulating layer thickness that allows the laser to penetrate. Also, the thin insulating layer thickness uniformity is tightly controlled to allow consistent laser cutting from fuse to fuse. In another embodiment, the thin protective insulating layer is formed after the fuse is blown. This invention prevents shorts between conductor that otherwise might occur due to debris from the fuse-blowing operation. But this invention has tradeoffs. The extra protective layer must be removed from some device surfaces, for example, over metal bonding areas. Also, forming the extra layer and partial removal steps add cost. Furthermore, this invention is not particularly applicable to alignment mark areas where any layers over the alignment marks degrade their readability. This is particularly important when using the auto-align photolithography tools. Moreover, the problem of moisture and contaminates diffusing through the insulating layers in the window still exists.
Machida U.S. Pat. No. 5,041,897 discloses a technique whereby a window is opened in the insulating layer above the fuse. The window has the shape of the fuse thus improving the heat-radiation away from the fuse. During the application of a high current which causes the fuse to open, this improved heat radiation prevents the surrounding insulation regions from cracking. However, the problem of contaminates diffusing to the semiconductor devices through the window still exists.